联系方式

wuzhou@ahnu.edu.cn

个人简介

周武，男，安徽六安人，1995年8月生，硕士生导师。2018年6月获合肥工业大学计算机科学与技术学士学位。2023年6月获合肥工业大学计算机科学与技术工学博士学位。2023年7月加入安徽师范大学计算机与信息学院，现为计算机与信息学院讲师。近年来，在IEEE Transactions on Very Large Scale Integration Systems、Integration, the VLSI Journal、Microprocessors and Microsystems、电子学报、电子与信息学报等计算机体系结构、集成电路等领域学术期刊发表发表多篇论文。主要研究方向包括集成芯片与芯粒技术、片上互连网络架构、集成电路设计等。

代表性论文

[1] Zhou Wu, XuDongyu, Xu Sheng, Luo Le, Chen Fulong, Ni Tianming and Wen Xiaoqing. Reconfigurable Fault-Tolerant Link With Bandwidth Expansion for 2.5-D Chiplet-Based Systems[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025, 33(11): 3043-3056.

[2]  周武, 倪天明, 徐冬雨, 徐晟, 罗乐, 陈付龙. 面向芯粒互连网络的故障与拥塞联合感知自适应路由算法[J]. 电子与信息学报, 2025, 47(9): 3155-3166.

[3]  Zhou Wu, Ouyang Yiming, Xu Dongyu, Huang Zhengfeng, Liang Huaguo, Wen Xiaoqing. Energy-efficient multiple network-on-chip architecture with bandwidth expansion[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(4): 442-455.

[4] Zhou Wu, Ouyang Yiming, Li Jianhua, Xu Dongyu. A transparent virtual channel power gating method for on-chip network routers[J]. Integration, the VLSI Journal, 2023, 88(March 2022): 286-297.

[5] Zhou Wu, Ouyang Yiming, Lu Yingchun, Liang Huaguo. A router architecture with dual input and dual output channels for Networks-on-Chip[J]. Microprocessors and Microsystems, 2022, 90(1): 104464.

[6]  Xu Dongyu, Zhou Wu*, Huang Zhengfeng, Liang Huaguo, Wen Xiaoqing. RHT_NoC: A Reconfigurable Hybrid Topology Architecture for Chiplet-Based Multicore System[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025,33(8): 2104-2117.

[7] Ouyang Yiming, Zhou Wu*, Li Sheng, Wang Zhilu, Liang Huaguo, Du Gaoming. Design of a wireless router with virtual channel fault tolerant in WiNoC[J]. Journal of Circuits, Systems and Computers, 2020, 29(10): 1-27.

[8] Xu Dongyu, Ouyang Yiming, Zhou Wu, Huang Zhengfeng, Liang Huaguo and Wen Xiaoqing. RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(12): 2061-2074.

主持的科研项目

[1] 安徽省车载显示集成系统工程研究中心, 开放课题, VDSI2023B01, 基于自适应容错链路的NoC设计研究, 2023-12 至 2025-12, 3万元, 已结题, 主持。